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CHERI Blossoms Conference 2026

A three-day Cambridge programme of tutorials, ecosystem updates, and technical talks for people researching, building, and adopting CHERI.

CHERI Blossoms Conference 2026

At a glance

When
–
Where
University of Cambridge, Cambridge, UK
Event status
Past event
Taking part
Speakers
Format
Conference
Series
CHERI Blossoms
Pre-Conference Tutorial
25 March 2026
Main Conference Date
26 – 27 March 2026
Venue
Department of Computer Science and Technology – William Gates Building, University of Cambridge, Cambridge, UK

Thank you to all who attended!

You can find details about CHERI Blossoms 2027 here.

Conference Overview

The CHERI Blossoms Conference 2026 was the must-attend event for forward-thinking decision-makers and innovators! This exclusive gathering was tailored for industry leaders, business strategists, product managers, researchers and technologists, who are poised to influence the future of digital security by design.

At this premier event, participants had the unique opportunity to engage with top experts and gain firsthand insights into the latest developments using CHERI (Capability Hardware Enhanced RISC Instructions) technology. Participants discovered how these cutting-edge advancements are revolutionizing the creation of resilient, secure systems and learn how integrating these innovations can provide a competitive edge for your organization.

Over 100 people attended the livestream via Zoom.

The CHERI Research Centre at the Computer Laboratory, Codasip, and lowRISC hosted a hands-on tutorial the day before CHERI Blossoms 2026. Designed for students, researchers, and developers, the session covered CHERI and CHERIoT, memory safety, compartmentalisation, and related hardware-software stacks, with presentations, code examples, and guided exercises.

Pre-Conference Tutorial: Hands-on Introduction to CHERI and CHERIoT

CHERI tutorial showing a demonstration in a classroom

The CHERI Research Centre at the Computer Laboratory, Codasip, and lowRISC co-organised a comprehensive tutorial on CHERI alongside the conference.

The agenda for the tutorial can be found on the tutorial webpage.

Agenda

The main conference ran over two consecutive days (Thursday and Friday), with the exhibition space open throughout.

Each day of the conference had a distinct focus:

  • Pre-Conference Tutorial (Wednesday 25th March 2026)
  • Hands-on Introduction to CHERI and CHERIoT
  • Main Conference – Day 1 (Thursday 26th March 2026)
  • Keynotes and general / business-focused sessions
  • CHERI Project 15th Birthday Party (including a light dinner)
  • Main Conference – Day 2 (Friday 27th March 2026)
  • Technical sessions

Recordings & Slides

CHERI Blossoms 2026 Conference - Event Showcase (2:14)

  • CHERI crash course - Robert Watson | CHERI Blossoms 2026 (15:39)

  • Keynote - CHERI: quantifying the value of a strategic imperative - Ollie Whitehouse | CB2026 (21:32)

  • Keynote - Featured Message - Kathleen Fisher | CHERI Blossoms 2026 (4:55)

  • Keynote – Memory Safety at Scale: An Industry Perspective - Alex Rebert | CHERI Blossoms 2026 (21:26)

  • DSIT: Government Strategy, Signals & Next Steps - Bradley Finn | CHERI Blossoms 2026 (7:33)

  • UKRI Talk - John Goodacre | CHERI Blossoms 2026 (7:37)

  • Progress of the Alliance - Mike Eftimakis | CHERI Blossoms 2026 (16:36)

  • Certification Program: Awards - Mike Eftimakis | CHERI Blossoms 2026 (4:09)

  • CHERI Research Centre - Robert Watson | CHERI Blossoms 2026 (22:07)

  • The Capable Hub: Our Recent Work and Next Steps - Andrew Murray | CHERI Blossoms 2026 (16:34)

  • Accelerating commercial adoption of CHERI - Manu Ravishankar | CHERI Blossoms 2026 (12:56)

  • A new analysis of CVE vulnerabilities: trends, changes and CHERI - Carl Shaw | CHERI Blossoms 2026 (17:17)

CHERI Mocha: an open-source memory-safe application system - Javier Orensanz Martinez | CB 2026 (9:50)

MMU-based revocation for temporal safety on CHERI application cores - Tariq Kurd & Alfredo Mazzinghi (17:40)

COSMIC verification: comprehensive, end-to-end formal proofs of CVA6-CHERI - Louis-Emile Ploix (22:24)

  • CHERI is being standardised, so why do we still need to do research? - Simon Moore | CB2026 (14:27)

  • CHERIoT-Kudu: A high-performance CHERIoT microcontroller - David Chisnall | CHERI Blossoms 2026 (3:40)

  • CHERI-PIT: Automatically porting C/C++ to CHERI - David Musliner | CHERI Blossoms 2026 (3:32)

  • CHERI-Zephyr - New release information! - Jennifer Jackson | CHERI Blossoms 2026 (3:28)

  • Microservice Store for CHERI - Murat Cakmak | CHERI Blossoms 2026 (3:26)

  • Performance Progress of CVA6-CHERI - Jonathan Woodruff | CHERI Blossoms 2026 (13:13)

  • CHERI Performance Improvement Update - Carl Shaw | CHERI Blossoms 2026 (15:32)

  • Securing Real-Time Communication - Peter Cox & Alexander Voevoda | CHERI Blossoms 2026 (16:46)

  • Rust on CHERIoT - Edoardo Marangoni | CHERI Blossoms 2026 (17:25)

  • CHERI Linking through the Ages - John Baldwin & Jessica Clarke | CHERI Blossoms 2026 (47:11)

Verifying Secure Memory Compartmentalization in CHERI Processors at the RTL - Johannes Müller (19:18)

Exhibitors

  • Cantech Informatics logo

  • Capabilities Limited logo

  • CHERI logo

  • CHERI Research Centre logo

  • Codasip logo

  • lowRISC logo

  • Novomorphic logo

  • Parvat logo

  • SCI Semiconductor logo

  • Sensor IT logo

  • UM Labs logo

  • Wyvern Global logo

Venue

CHERI Blossoms 2026 was held in Cambridge UK, at the Department of Computer Science and Technology in the William Gates Building, on the University of Cambridge’s West Cambridge site, located off Madingley Road.

Address

William Gates Building

15 JJ Thomson Ave

Cambridge CB3 0FD

  • William Gates building - Outside view

  • CHERI Blossoms 2026 Robert Watson giving a talk

  • CHERI Blossoms 2026 exhibition

View map

Speakers

Keynote Speakers

  • Alex Rebert

    Google

    Alex Rebert

    Alex Rebert is an engineer at Google, where he focuses on memory safety. Previously, he co-founded ForAllSecure and led the creation of Mayhem, the autonomous cyber re...

  • Kathleen Fisher

    ARIA

    Kathleen Fisher

    Kathleen Fisher has been instrumental in bringing CHERI from research into national programmes. A long‑standing leader in secure systems and programming languages, she...

  • Maika Föhrenbach

    European Commission (DG CONNECT)

    Maika Föhrenbach

    Maika Föhrenbach connects CHERI to Europe’s regulatory future. She leads product security and certification policy at the European Commission and coordinates implement...

  • Ollie Whitehouse

    National Cyber Security Centre

    Ollie Whitehouse

    Ollie is a fellow of the Royal Academy of Engineering whose career in cyber security spans over 30 years. Today he serves as the Chief Technical Officer for the Nation...

  • Sam Cater

    BT

    Sam Cater

    Sam is a Research Technical Manager within BT’s Research and Commercialisation department, focussing on Cybersecurity technologies. Throughout his career, he has held ...

  • Adam Finney

    CHERI Alliance

    Adam Finney

    Adam Finney is a CHERI technologist with over 20 years of systems experience, and a key driver of CHERI adoption. As Lead of the Adoption Programme and Marketing Worki...

  • Alexander Voyevoda

    UM Labs

    Alexander Voyevoda

    Alex Voyevoda is a senior systems engineer focused on turning high‑assurance ideas into production systems. With over 30 years of experience in low‑level C systems on ...

  • Alfredo Mazzinghi

    Capabilities Limited

    Alfredo Mazzinghi

    Alfredo is a Research Assistant at University of Cambridge and Research Engineer at Capabilities Limited. Their main research interest is on memory safety in operating...

  • Andrew Murray

    The Good Penguin

    Andrew Murray

    Andrew Murray is founder and director of The Good Penguin, a UK based consultancy with a focus and passion for embedded Linux, low level and open-source software. The ...

  • Andy Moore

    RISC-V International

    Andy Moore

    Andy Moore drives awareness and adoption of RISC‑V across its global member ecosystem. As Director of Marketing at RISC‑V International, and with deep prior experience...

  • Ben Fletcher

    Codasip

    Ben Fletcher

    Ben Fletcher has been involved in SoC development for over 25 years. He has worked in design, verification, software, and more recently Architecture. He has worked for...

  • Bradley Finn

    DSIT

    Bradley Finn

    Bradley Finn is Head of Cyber Innovation Policy at the UK’s Department for Science, Innovation and Technology. He is responsible for polices and programmes to support ...

  • Carl Shaw

    Codasip

    Carl Shaw

    Carl Shaw is a hands-on technical expert with a diverse background in embedded systems and security engineering. His work focuses on the intersection of hardware and s...

  • Dave Harcourt

    BT

    Dave Harcourt

    Dave Harcourt is the CISO for BT International and a BT Fellow, with decades of experience shaping cyber security at scale. He sets security strategy for BT and influe...

  • David Chisnall

    SCI Semiconductor

    David Chisnall

    David Chisnall has been working on CHERI since 2012, when he joined the University of Cambridge to lead the languages and compiler work on the CHERI project. He joined...

  • David Musliner

    Smart Information Flow Technologies (SIFT)

    David Musliner

    Dr. David Musliner is a Senior Research Fellow at Smart Information Flow Technologies (SIFT).

  • Edoardo Marangoni

    SCI Semiconductor

    Edoardo Marangoni

    Edoardo has been working with compilers for the majority of his professional career. After working in the Wasm space, he joined SCI Semiconductor and started working o...

  • Javier Orensanz Martinez

    lowRISC

    Javier Orensanz Martinez

    Javier is a business leader with over 25 years of experience in the semiconductors industry. He was the general manager of Arm’s tools business unit for 8 years, and i...

  • Jennifer Jackson

    University of Birmingham

    Jennifer Jackson

    Jennifer is an Electronic Engineer with experience in FPGA design, Arm v8.2, computer security, capability architectures, CHERI, LLVM tool chain, RISC-V development an...

  • Jessica Clarke

    University of Cambridge

    Jessica Clarke

    Jessica Clarke is a Senior Research Software Engineer at the University of Cambridge, contributing to the maintenance and development of CHERI LLVM and CheriBSD, and h...

  • Jianyi Cheng

    University of Edinburgh

    Jianyi Cheng

    Jianyi Cheng is an Assistant Professor in the School of Informatics at the University of Edinburgh. His research aims to automatically produce small, fast, low-energy,...

  • Johannes Müller

    RPTU Kaiserslautern-Landau

    Johannes Müller

    Johannes Müller received his Dipl.-Ing. degree in Electrical and Computer Engineering from the Technische Universität Kaiserslautern in 2018. He is currently a Ph.D. c...

  • John Baldwin

    Ararat River Consulting, LLC

    John Baldwin

    John Baldwin has been an active FreeBSD developer for over 25 years working on a broad range of subsystems in the kernel and bits of userspace. John has also contribut...

  • John Goodacre

    UKRI

    John Goodacre

    Prof. John Goodacre: University of Manchester, Director Digital Security by Design: UKRIJohn is Professor of Computer Architectures at the Department of Computer Scien...

  • Jonathan Woodruff

    Capabilities Limited

    Jonathan Woodruff

    Dr Jonathan Woodruff is a Senior Research Associate with expertise in processor architecture and microarchitecture as well as low-level software optimisation. Speciali...

  • Louis-Emile Ploix

    lowRISC

    Louis-Emile Ploix

    Louis-Emile is a current undergraduate at the University of Oxford, and a formal verification engineer for lowRISC working on the COSMIC project.

  • Luca Müller

    German Research Center for Artificial Intelligence (DFKI)

    Luca Müller

    Luca Müller received the M.Sc. degree in computer science from University of Bremen in 2025. He is currently a Researcher in the Cyber-Physical Systems Group at the Ge...

  • Marno van der Maas

    lowRISC

    Marno van der Maas

    Dr Marno van der Maas completed a PhD at the University of Cambridge in 2022 on protecting trusted execution environments from side-channel attacks. During this time, ...

  • Manu Ravishankar

    PA Consulting

    Manu Ravishankar

    Manu Ravishankar is a Principal Consultant specialising in innovation strategy, programme design and technology commercialisation. Formerly Head of Insights and Impact...

  • Merve Gülmez

    Ericsson

    Merve Gülmez

    Merve Gülmez is a researcher at Ericsson Security Research. She holds a PhD in Computer Science from KU Leuven, and her research focuses on systems security, memory sa...

  • Mike Eftimakis

    CHERI Alliance

    Mike Eftimakis

    Mike Eftimakis has an extensive background in the semiconductor and electronics industry with 30 years in senior technical and business roles. He has a rich history of...

  • Murat Cakmak

    Microservice Store

    Murat Cakmak

    Murat is Co-CEO @ Microservice Store.

  • Paul Metzger

    University of Cambridge

    Paul Metzger

    Dr Paul Metzger is a Research Associate in the Department of Computer Science and Technology at the University of Cambridge. He recently started working on CHERI OS AP...

  • Peter Cox

    UM Labs

    Peter Cox

    Peter Cox is the CEO and founder of UM Labs, a UK R&D company specialising in cybersecurity for real-time application on IP networks. Peter has over 30 years’ experien...

  • Robert Watson

    CHERI Alliance, University of Cambridge

    Robert Watson

    Professor Robert N. M. Watson is a Professor of Systems, Security, and Architecture at the University of Cambridge’s Department of Computer Science and Technology. His...

  • Samuel Stark

    University of Cambridge

    Samuel Stark

    Samuel W. Stark is a final-year PhD student at the University of Cambridge, studying alternate capabilty systems under Simon W. Moore, with a published article on the ...

  • Simon Moore

    University of Cambridge

    Simon Moore

    Professor Simon Moore is Professor of Computer Engineering at the University of Cambridge, where he leads research in computer architecture with a focus on secure and ...

  • Tariq Kurd

    Codasip

    Tariq Kurd

    Tariq Kurd has been involved in CPU architecture, design, and verification for over 25 years, primarily in the embedded field. He has worked on VLIW, multithreading, o...

  • Thomas Nyman

    Ericsson

    Thomas Nyman

    Thomas Nyman holds a position as Expert in Trusted Hardware & Software Technologies at the telecommunications company Ericsson where he works with software and platfor...

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